The invention generally relates to a power gridding scheme.
Microprocessors are being fabricated with increasingly higher speeds and device density. As a result, the power that is consumed by a microprocessor continues to increase from one generation to the next. This increase in power usage, in turn, may present several challenges.
For example, the microprocessor has a finite number of external contacts (positive and negative supply voltage contacts, for example) to communicate power to the microprocessor. For example, these external contacts may be solder bumps that are part of a ball and grid package, a package in which the solder bumps are arranged in a rectangular grid, or array. In this array, the distances between adjacent solder bumps typically decreases from one generation microprocessor to the next in an attempt to increase the number of solder bumps that are available to communicate power. However, the increase in bump density does not track the corresponding increase in the speed and scaling of devices in the microprocessor. As a result, there is a net reduction in the number of solder bumps for power per device in the microprocessor. Thus, the net result of the increased power density for these solder bumps is that the current densities of some solder bumps may be large enough to possibly cause premature failure of these solder bumps due to the process of electromigration (EM).
Thus, there is a continuing need for an arrangement that addresses one or more of the problems that are stated above.